Hossam A. H. Fahmy

In this paper, the dependence of the instantaneous memristance value and its I–V characteristics on a periodic signal phase are studied. Hence, expression for the instantaneous memristance as a function of the periodic input phase is derived. This derivation is based on the memristor linear dopant drift model and is provided for sinusoidal input waveforms. To prove the tendency, simulations using linear and nonlinear dopant drift memristor models are performed in the Cadence simulation environment. Based on those, a set of digital communication demodulators are proposed and investigated exploiting the change of the average memristance with the initial phase of applied signal. The experimental-based `nonlinear' dopant drift model is used in designing the proposed demodulators for Binary Phase Shift Keying (BPSK) and Quadrature Phase Shift Keying (QPSK) modulation schemes. Since all proposed demodulators are asynchronous, the proposed circuits do not need any carrier recovery circuits. Moreover, transient simulations have been executed showing the proper matching to the expected performance.

In this work we present a new 64-bit floating point Fused Multiply Add (FMA) unit that can perform both binary and decimal addition, multiplication, and fused-multiply-add operations. The presented FMA has 6% less delay than the fastest stand-alone decimal unit and 23% less area than both binary and decimal units together. These results were achieved by the use of: 1) column by column reduction to reduce the partial products in the multiplier tree, 2) a new leading zeros detector that produces its output in base-3 to simplify the normalization shifting in the binary datapath, 3) the use of a redundant adder to perform the final addition, 4) using a new rounding-while-redundant technique to hide the rounding delay and remove it from the critical path, and 5) using a new simple conversion technique from redundant to binary/decimal.

There is a continuous demand on novel chaotic generators to be employed in various modeling and pseudo-random number generation applications. This paper proposes a new chaotic map which is a general form for one-dimensional discrete-time maps employing the power function with the tent and logistic maps as special cases. The proposed map uses extra parameters to provide responses that fit multiple applications for which conventional maps were not enough. The proposed generalization covers also maps whose iterative relations are not based on polynomials, i.e., with fractional powers. We introduce a framework for analyzing the proposed map mathematically and predicting its behavior for various combinations of its parameters. In addi- tion, we present and explain the transition map which results in intermediate responses as the parameters vary from their values corresponding to tent map to those corresponding to logistic map case. We study the properties of the proposed map including graph of the map equation, general bifurcation diagram and its key-points, output sequences, and maximum Lyapunov exponent. We present further explorations such as effects of scaling, system response with respect to the new parameters, and operating ranges other than transition region. Finally, a stream cipher system based on the generalized transition map validates its utility for image encryption applications. The system allows the construction of more efficient encryption keys which enhances its sensitivity and other cryptographic properties.

Memristors exhibit very promising features such as nonvolatility and small area. Several types of memristors have been developed in the last decade using different materials along with physical models explaining their behaviors. In this paper, we modify a previously published model to account for a trapezoidal electron tunneling barrier rather than a zero field or constant potential barrier. The model is verified against experimental data showing better agreement. We then perform a study to find out the effect of different memristors parameters on its I-V characteristics and how to shape the characteristics to fit the applications. Finally, we provide a SPICE model which takes into account the tunneling capacitance and clarify that any fabricated memristor has, inherently, a memcapacitor in parallel. The dominant element may be the memristor or the memcapacitor depending on the frequency of operation.