Publications

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Conference Paper
Hamdy, M., O. Nasr, A. F. Shalash, and others, "ASIP design of a reconfigurable channel estimator for OFDM systems", Microelectronics (ICM), 2011 International Conference on: IEEE, pp. 1–5, 2011. Abstract
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Hassan, H. M., A. F. Shalash, and H. M. Hamed, "Design architecture of generic DFT/DCT 1D and 2D engine controlled by SW instructions", Circuits and Systems (APCCAS), 2010 IEEE Asia Pacific Conference on: IEEE, pp. 84–87, 2010. Abstract
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Shaker, M. N. H., H. M. Hamed, A. F. Shalash, and H. A. H. Fahmy, "Efficient implementation of time de-interleaver for DVB-T2", International Conference on Communication, Control and Computer Engineering,(ICCCCE), Istanbul, Turkey, 2013. Abstract
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Hassan, H. M., A. F. Shalash, and K. Mohamed, "FPGA Implementation of an ASIP for high throughput DFT/DCT 1D/2D engine", Circuits and Systems (ISCAS), 2011 IEEE International Symposium on: IEEE, pp. 1255–1258, 2011. Abstract
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Hossam, E. M., H. A. H. Fahmy, M. M. Khairy, and A. F. Shalash, "Memory conflict analysis for a multi-standard, reconfigurable turbo decoder", Circuits and Systems (ISCAS), 2011 IEEE International Symposium on: IEEE, pp. 2701–2704, 2011. Abstract
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Conference Proceedings
Saad, S. M., H. M. Hamed, and A. F. Shalash, "Low complexity maximum likelihood estimation of time and frequency offset for DVB-T2", New Circuits and Systems Conference (NEWCAS), 2013 IEEE 11th International, France, IEEE, pp. 16-19, 2013.
Journal Article
Abdelall, M., H. M. Hassan, M. Hamdy, O. A. Nasr, K. Mohamed, and A. F. Shalash, "Design and implementation of application-specific instruction-set processor design for high-throughput multi-standard wireless orthogonal frequency division multiplexing baseband processor", IET Circuits, Devices & Systems, vol. 9, no. 3: IET, pp. 191–203, 2015. Abstract
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Saudy, N. F., A. F. Shalash, and A. - K. S. O. Hassan, "Error Analysis and Detection Procedures for probabilistic public key cryptography (NTRU) ", WULFENIA, vol. 20, issue 12, pp. 97-113, 2013.
Hassan, H. M., K. Mohamed, and A. F. Shalash, "Implementation of a reconfigurable ASIP for high throughput low power DFT/DCT/FIR engine.", EURASIP J. Emb. Sys., vol. 2012, pp. 3, 2012. Abstract
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Hassan, A. - K. S. O., A. F. Shalash, and N. F. Saudy, "MODIFICATIONS ON RSA CRYPTOSYSTEM USING GENETIC OPTIMIZATION", International Journal of Research and Reviews in Applied Sciences, vol. 19, no. 2: Academic Research Publishing Agency:(arapapress), pp. 150, 2014. Abstract
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Hassan, K. S., H. M. Hamed, Y. A. Fahmy, and A. F. Shalash, Reduced Complexity Iterative Solution For I/Q Imbalance Problem In DVB-T2 Systems, , 2012. Abstract

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