FPGA Implementation of an ASIP for high throughput DFT/DCT 1D/2D engine
- Citation:
- Hassan, H. M., A. F. Shalash, and K. Mohamed,
"FPGA Implementation of an ASIP for high throughput DFT/DCT 1D/2D engine",
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on: IEEE, pp. 1255–1258, 2011.
Abstract:
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Notes:
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