@conference {6766390,
	title = {A novel 3D crossbar-based chip multiprocessor architecture},
	booktitle = {2013 Second International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)},
	year = {2013},
	note = {n/a},
	month = {Dec},
	pages = {83-87},
	abstract = {n/a},
	keywords = {2D architecture, 3D crossbar-based architecture, 3D crossbar-based chip multiprocessor architecture, 3D die-stacking technology, 3D stacked dies, 3D stacking, cache modules, cache storage, chip multiprocessor, computer architecture, Computers, crossbar, high performance processors, high-performance processor design, integrated circuit design, integrated circuit interconnections, interconnect delays, L2 cache bank, many-core CMP, Moore law, Multiplexing, multiprocessor interconnection networks, network-on-chip, performance degradation, Ports (Computers), power consumption, scalability, scalable interconnection network, Three-dimensional displays, three-dimensional integrated circuits, Through-silicon vias},
	issn = {null},
	doi = {10.1109/JEC-ECC.2013.6766390},
	author = {Mahmoud, M and A. Wassal}
}
