@conference {8573527,
	title = {Memory Requirements for Convolutional Neural Network Hardware Accelerators},
	booktitle = {2018 IEEE International Symposium on Workload Characterization (IISWC)},
	year = {2018},
	note = {n/a},
	month = {Sep.},
	pages = {111-121},
	abstract = {n/a},
	keywords = {accelerator design, application domains, Bandwidth, CNN, convolution, convolutional neural network hardware accelerators, Convolutional neural networks, Deep Convolutional Neural Networks, efficient hardware, fast hardware, feedforward neural nets, Hardware, hardware acceleration, image resolution, learning (artificial intelligence), Memory management, memory requirements, memory system, memory-intensive nature, off-chip memory bandwidth, on-chip memory size, Organizations, storage management, system-on-chip},
	issn = {null},
	doi = {10.1109/IISWC.2018.8573527},
	author = {K. {Siu} and D. M. {Stuart} and Mahmoud, M and A. {Moshovos}}
}
