Design Guidelines for the High-Speed Dynamic Partial Reconfiguration Based Software Defined Radio Implementations on Xilinx Zynq FPGA

Citation:
ELdin, A. K., A. Mohamed, A. Nagy, Y. Gamal, A. Shalash, Y. Ismail, and H. Mostafa, "Design Guidelines for the High-Speed Dynamic Partial Reconfiguration Based Software Defined Radio Implementations on Xilinx Zynq FPGA", IEEE International Symposium on Circuits and Systems (ISCAS 2017), Baltimore, USA, pp. 1-4, 2017. copy at www.tinyurl.com/y5bw7osu
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