Utilizing Dynamic Partial Reconfiguration to Reduce the Cost of FPGA Debugging
- Citation:
- Ahmed, I., A. K. ELdin, H. Mostafa, and A. Mohieldin, "Utilizing Dynamic Partial Reconfiguration to Reduce the Cost of FPGA Debugging", IEEE International NEW Circuits and Systems Conference (NEWCAS 2018), Montreal, Canada, pp. 205-208, 2018. copy at www.tinyurl.com/y3nxejc2