Optimizing FPGA-based Hard Networks-on-Chip by Minimizing and Sharing Resources
- Citation:
- Attia, S., H. A. H. Fahmy, and H. Mostafa, "Optimizing FPGA-based Hard Networks-on-Chip by Minimizing and Sharing Resources", Elsevier Integration VLSI Journal, vol. 63, pp. 138-147, 2018. copy at www.tinyurl.com/y278lnrh