Publications

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2015
A. A. Morgan, H. Elmiligi, E. - K. G. M. W. F., "Networks-on-Chip Architecture Customization using Network Partitioning: A System-Level Performance Evaluation", International Journal of Computing and Digital Systems, vol. 4, no. 1, pp. 19–31, 2015. Abstract
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2013
Morgan, A., H. Elmiligi, W. M. El-Kharashi, F. Gebali, and others, "Unified multi-objective mapping and architecture customisation of networks-on-chip", Computers & Digital Techniques, IET, vol. 7, no. 6: IET, pp. 282–293, 2013. Abstract
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2012
A. A. Morgan, H. Elmiligi, E. - K. M. W., and F. Gebali, "Bio-inspired NoC architecture optimization", Autonomic Networking-on-Chip: Bio-inspired Specification, Development, and Verification: CRC Press, 2012. Abstract
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2011
Elmiligi, H., A. A. Morgan, W. M. El-Kharashi, and F. Gebali, "Improving Networks-on-Chip performability: A topology-based approach", International Journal of Circuit Theory and Applications, vol. 39, no. 6: Wiley Online Library, pp. 557–572, 2011. Abstract
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2010
Morgan, A., H. Elmiligi, W. M. El-Kharashi, F. Gebali, and others, "Multi-objective optimization for networks-on-chip architectures using genetic algorithms", Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on: IEEE, pp. 3725–3728, 2010. Abstract
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Morgan, A., H. Elmiligi, W. M. El-Kharashi, F. Gebali, and others, "Multi-objective optimization of NoC standard architectures using Genetic Algorithms", Signal Processing and Information Technology (ISSPIT), 2010 IEEE International Symposium on: IEEE, pp. 85–90, 2010. Abstract
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Elmiligi, H., A. Morgan, W. M. El-Kharashi, F. Gebali, and others, "Networks-on-chip topology optimization subject to power, delay, and reliability constraints", Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on: IEEE, pp. 2354–2357, 2010. Abstract
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2009
Morgan, A., H. Elmiligi, W. M. El-Kharashi, F. Gebali, and others, "Area and delay optimization for Networks-on-Chip architectures using Genetic Algorithms", Design and Test Workshop (IDT), 2009 4th International: IEEE, pp. 1–6, 2009. Abstract
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Morgan, A., H. Elmiligi, W. M. El-Kharashi, F. Gebali, and others, "Area-aware topology generation for Application-Specific Networks-on-Chip using network partitioning", Communications, Computers and Signal Processing, 2009. PacRim 2009. IEEE Pacific Rim Conference on: IEEE, pp. 979–984, 2009. Abstract
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Elmiligi, H., A. Morgan, W. M. El-Kharashi, F. Gebali, and others, "A delay-aware topology-based design for Networks-on-Chip applications", Design and Test Workshop (IDT), 2009 4th International: IEEE, pp. 1–5, 2009. Abstract
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Elmiligi, H., A. A. Morgan, W. M. El-Kharashi, and F. Gebali, "Power optimization for application-specific networks-on-chips: A topology-based approach", Microprocessors and Microsystems, vol. 33, no. 5: Elsevier, pp. 343–355, 2009. Abstract
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Elmiligi, H., A. Morgan, W. M. El-Kharashi, F. Gebali, and others, "A reliability-aware design methodology for networks-on-chip applications", Design & Technology of Integrated Systems in Nanoscal Era, 2009. DTIS'09. 4th International Conference on: IEEE, pp. 107–112, 2009. Abstract
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2008
Morgan, A. A., H. Elmiligi, W. M. El-Kharashi, and F. Gebali, "Application-specific networks-on-chip topology customization using network partitioning", Proceedings of the 1st international forum on Next-generation multicore/manycore technologies: ACM, pp. 13, 2008. Abstract
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Morgan, A., H. Elmiligi, W. M. El-Kharashi, F. Gebali, and others, "Networks-on-Chip topology generation techniques: Area and delay evaluation", Design and Test Workshop, 2008. IDT 2008. 3rd International: IEEE, pp. 33–38, 2008. Abstract
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Elmiligi, H., A. Morgan, W. M. El-Kharashi, F. Gebali, and others, "Power-aware topology optimization for networks-on-chips", Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on: IEEE, pp. 360–363, 2008. Abstract
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2007
Elmiligi, H., A. Morgan, W. M. El-Kharashi, F. Gebali, and others, "Performance Analysis of Networks-on-Chip Routers", Design and Test Workshop, 2007. IDT 2007. 2nd International: IEEE, pp. 232–236, 2007. Abstract
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Elmiligi, H., A. Morgan, W. M. El-Kharashi, F. Gebali, and others, "A topology-based design methodology for networks-on-chip applications", Design and Test Workshop, 2007. IDT 2007. 2nd International: IEEE, pp. 61–65, 2007. Abstract
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2005
Morgan, A., M. E. Allam, M. Salama, H. A. K. Mansour, and others, "Implementation of an Arm Compatible Processor Core for SOC Designs", Information and Communications Technology, 2005. Enabling Technologies for the New Knowledge Society: ITI 3rd International Conference on: IEEE, pp. 851–859, 2005. Abstract
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