Publications

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2013
Eltaliawy, A., H. Mostafa, and Y. Ismail, "Microscale Solar Energy Harvesting for Wireless Sensor Networks Based on Exponential Maximum Power Locking Technique", IEEE International Conference on Electronics, Circuits, and Systems (ICECS'13), Abu Dhabi, United Arab Emirates, IEEE, pp. 889 - 892, 2013. [PDF]
Mostafa, H., M. Anis, and M. Elmasry, "Negative capacitance circuits for process variations compensation and timing yield improvement", IEEE International Conference on Electronics, Circuits, and Systems (ICECS'13) , Abu Dhabi, United Arab Emirates , IEEE, pp. 277 - 280, 2013. [PDF]
Mostafa, H., M. Anis, and M. Elmasry, "Statistical SRAM Read Access Yield Improvement Using Negative Capacitance Circuits", IEEE Transactions on Very Large Scale Integra- tion Systems (TVLSI), vol. 21, issue 1: IEEE, pp. 92-101, 2013. Abstract[PDF]

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2012
Mostafa, H., M. Anis, and M. Elmasry, "NBTI and Process Variations Compensation Circuits Using Adaptive Body Bias", Semiconductor Manufacturing, IEEE Transactions on, vol. 25, no. 3: IEEE, pp. 460–467, 2012. Abstract[PDF]

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Mostafa, H., M. Anis, and M. Elmasry, "On-Chip Process Variations Compensation Using an Analog Adaptive Body Bias (A-ABB)", Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 20, no. 4: IEEE, pp. 770–774, 2012. Abstract[PDF]

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2011
Mostafa, H., M. Anis, and M. Elmasry, "Adaptive body bias for reducing the impacts of NBTI and process variations on 6T SRAM cells", Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 58, no. 12: IEEE, pp. 2859–2871, 2011. Abstract[PDF]

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Mostafa, H., M. H. Anis, and M. Elmasry, "Analytical soft error models accounting for die-to-die and within-die variations in sub-threshold SRAM cells", Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 19, no. 2: IEEE, pp. 182–195, 2011. Abstract[PDF]

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Mostafa, H., M. Anis, and M. Elmasry, "A Bias-Dependent Model for the Impact of Process Variations on the SRAM Soft Error Immunity", Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 19, no. 11: IEEE, pp. 2130–2134, 2011. Abstract[PDF]

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Mostafa, H., M. Anis, and M. Elmasry, "A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation", Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 19, no. 10: IEEE, pp. 1848–1860, 2011. Abstract[PDF]

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Mostafa, H., M. Anis, and M. Elmasry, "Novel timing yield improvement circuits for high-performance low-power wide fan-in dynamic OR gates", Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 58, no. 8: IEEE, pp. 1785–1797, 2011. Abstract[PDF]

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Mostafa, H., M. Anis, and M. Elmasry, Robust Design of Variation-Sensitive Digital Circuits, , Waterloo, University of Waterloo, 2011. Abstract[PDF]

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Sadrossadat, S. A., H. Mostafa, and M. Anis, "Statistical Design Framework of Submicron Flip-Flop Circuits Considering Process Variations", Semiconductor Manufacturing, IEEE Transactions on, vol. 24, no. 1: IEEE, pp. 69–79, 2011. Abstract[PDF]

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2010
Mostafa, H., M. Anis, and M. Elmasry, "Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops", Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on: IEEE, pp. 1739–1742, 2010. Abstract[PDF][PPT]

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Mostafa, H., M. Anis, and M. Elmasry, "A design-oriented soft error rate variation model accounting for both die-to-die and within-die variations in submicrometer CMOS SRAM cells", Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 57, no. 6: IEEE, pp. 1298–1311, 2010. Abstract[PDF]

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Mostafa, H., H. Mohamed, and A. M. Soliman, "NOVEL FCS-BASED LAYOUT-FRIENDLY ACCURATE WIDE-BAND LOW-POWER CCII-REALIZATIONS", Journal of Circuits, Systems, and Computers, vol. 19, no. 05: World Scientific, pp. 997–1014, 2010. Abstract[PDF]

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Mostafa, H., M. Anis, and M. Elmasry, "Statistical timing yield improvement of dynamic circuits using negative capacitance technique", Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on: IEEE, pp. 1747–1750, 2010. Abstract[PDF][PPT]

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2009
Mostafa, H., M. Anis, and M. Elmasry, "Comparative analysis of process variation impact on flip-flops soft error rate", Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on: IEEE, pp. 103–108, 2009. Abstract[PDF][PPT]

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Mostafa, H., M. Anis, and M. Elmasry, "Comparative analysis of timing yield improvement under process variations of flip-flops circuits", VLSI, 2009. ISVLSI'09. IEEE Computer Society Annual Symposium on: IEEE, pp. 133–138, 2009. Abstract[PDF][PPT]

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Mostafa, H., M. Anis, and M. Elmasry, "The impact of timing yield improvement under process variation on flip-flops soft error rate", Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on: IEEE, pp. 109–117, 2009. Abstract[PDF][PPT]

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Mostafa, H., and A. M. Soliman, "Novel low-power accurate wide-band cmos negative-second-generation-current-conveyor realizations based on floating-current-source building blocks", Science and Technology for Humanity (TIC-STH), 2009 IEEE Toronto International Conference: IEEE, pp. 720–725, 2009. Abstract[PDF]

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Khalek, F., H. Mostafa, and M. Anis, "Statistical model for ring oscillator phase noise variability accounting for within-die process variation", Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on: IEEE, pp. 118–121, 2009. Abstract[PDF]

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2006
Mostafa, H., and A. M. Soliman, "A modified CMOS realization of the operational transresistance amplifier (OTRA)(vol 60, pg 70, 2006)", FREQUENZ, vol. 60, no. 7-8: FACHVERLAG SCHIELE SCHON MARKGRAFENSTRASSE 11, D-10969 BERLIN, GERMANY, pp. 121–121, 2006. Abstract[PDF]

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Hassan, H. M., and A. M. Soliman, "Novel accurate wideband CMOS current conveyor", Frequenz, vol. 60, no. 11-12, pp. 234–236, 2006. Abstract[PDF]

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2005
Hassan, H. M., and A. M. Soliman, "Novel CMOS Realizations of the Operational Floating Conveyor and Applications", Journal of Circuits, Systems, and Computers, vol. 14, no. 06: World Scientific, pp. 1113–1143, 2005. Abstract[PDF]

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Mostafa, H., and A. M. Soliman, Novel high performance CMOS analog building blocks suitable for analog signal processing, , Cairo, Cairo University, 2005.