F.Abu-Elyazeed, M., A. G.Radwan, L. A.Said, and J. A. A. El-Maksoud, "FPGA Implementation of Integer/Fractional Chaotic Systems", Multimedia Security Using Chaotic Maps: Principles and Methodologies: Springer, 2020.
F.Abu-Elyazeed, M., A. G.Radwan, L. A.Said, and S. M. Ismil, "A novel image encryption system merging fractional-order edge detection and generalized chaotic maps", Signal Processing, vol. 167, pp. 1-21, 2020.
F.Abu-Elyazeed, M., A. G.Radwan, L. A.Said, J. A. A. El-Maksoud, A. A. A. El-Kader, B. G.Hassan, N. G.Rihan, and M. F.Tolba, "FPGA implementation of sound encryption system based on fractional-order chaotic systems", Microelectronics Journal, vol. 90, pp. 323-335, 2019.
application/pdf iconj134_-_2019_fpga_implementation_of_sound_encryption_system_based_on_fractional-order_chaotic_systems.pdf
Ismail, S. M., L. A. Said, A. G. Radwan, A. H. Madian, and M. F. Abu-ElYazeed, "Generalized double-humped logistic map-based medical image encryption", Journal of Advanced Research, vol. 10, pp. 85-98, 2018. j105-_2018_generalized_double-humped_logistic_map.pdf
Said, L. A., S. M. Ismail, A. G. Radwan, A. H. Madian, M. A. F. El-Yazeed, and A. M. Soliman, "On The Optimization of Fractional Order Low-Pass Filters", Circuits Syst Signal Process, vol. 35, issue 00034-016-0258-y, pp. 2017-2039, 2016. 44_on_the_optimization_of_fractional_order_low-pass.pdf
Omnia S. Fadl a c, A. M. H., M. F. Abu-ElYazeed, M. B. Abdelhalim, H. H. Amer, and M. F. Abu-Elyazeed, "Accurate dynamic power estimation for CMOS combinational logic circuits with gates real-delay model", Journal of Advanced Research (JAR), vol. 7, issue 2090-1232, pp. 89-94, 2016. 43_accurate_dynamic_power_estimation_for_cmos.pdf
Abdel-Sayed, M. M., A. Khattab, and M. F. Abu-ElYazeed, "RMP: Reduced-set matching pursuit approach for efficient compressed sensing signal reconstruction", Journal of Advanced Research , vol. 7, issue 2090-1232, pp. 851-861, 2016. 46_rmp_reduced-set_matching_pursuit_approach_for.pdf
M.F.Abu-Elyazeed, "Process variability-induced NoC link failure:Aprobabilistic model", MicroelectronicsJournal, vol. 46, pp. 248-257, 2015. micro_electronic_journal.pdf
Abu-Elyazeed, M. F., "Variability-tolerant routing algorithms for Networks-on-Chip", Microprocessors and Microsystems, vol. 38, pp. 1037-1045, 2014. variability-tolerant_routing_algorithms_for_networks-on-chip.pdf
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