Ahmed I. S. Khalil
Teaching Assistiant
Department of Electronics and Electrical Communications Engineering (EECE), Faculty of Engineering, Cairo University, Giza, 12613, Egypt. (email)
Department of Electronics and Electrical Communications Engineering (EECE), Faculty of Engineering, Cairo University, Giza, 12613, Egypt. (email)
Mr. Khalil is a digital design engineer in the Solid State Laboratory (SSL), EECE department, Faculty of Engineering, Cairo University, Egypt. This work includes
• Adding new peripherals to the processor to be compliant with IEEE-1149.1 standard (JTAG).
• Designing a scan chains to enhance the observability and controllability of the CUSPARC processor.
• Polishing the current processor design, making a fabrication on IBM 130-nm technology, and testing the fabricated chip.
• Making a software driver that use the JTAG peripheral and the scan chains to program an external memory and making a debug for the CUSPARC processor.